Hsinchu, Taiwan

J H Tsai

This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2000.

IDiyas Innovation Intelligence. (2026). Inventor Profile: J H Tsai. Retrieved from https://idiyas.com/inventor/j-h-tsai-0olc3hg6

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 13(Granted Patents)


Company Filing History:


Years Active: 2000

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1 patent (USPTO):Explore Patents

Title: J H Tsai: Innovator in Semiconductor Technology

Introduction

J H Tsai is a notable inventor based in Hsin-Chu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the area of shallow trench isolation.

Latest Patents

J H Tsai holds a patent for a method of forming a shallow trench isolation that features rounded and protected corners. This innovative method involves creating a bird's beak field oxide layer before the trench-forming step. The design ensures that both the top and bottom corners of the trench have a radius of at least 100 angstroms and a trench depth of no more than 5000 angstroms. The top corner is safeguarded by the beak portion of the bird's beak against etching during subsequent oxide dip processes before gate formation.

Career Highlights

J H Tsai is associated with Taiwan Semiconductor Manufacturing Company Ltd., a leading firm in the semiconductor industry. His work has contributed to advancements in manufacturing processes that enhance the performance and reliability of semiconductor devices.

Collaborations

He has collaborated with notable colleagues, including Chue-San Yoo and R Y Lee, who have also made significant contributions to the field.

Conclusion

J H Tsai's innovative methods in semiconductor technology exemplify the importance of creativity and precision in the industry. His contributions continue to influence advancements in semiconductor manufacturing processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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