Average Co-Inventor Count = 4.7

ph-index = 5

Forward Citations = 99(Granted Patents)

Location History:

Milpitas, CA (US) (2015)
Saratoga, CA (US) (2016)
San Joe, CA (US) (2019)
San Jose, CA (US) (2010 - 2022)

Company Filing History:

9 out of 8,679

Seagate Technology Incorporated

patents

3 out of 2,636

Hitachi Global Storage Technologies Netherlands B.v.

patents

2 out of 987

Hgst Netherlands, B.v.

Western Digital Technologies, Inc.

patents

Years Active: 2010-2025

where 'Filed Patents' based on already Granted Patents

18 patents (USPTO):Sort by Forward Citations

Abstract keywords

1. 12450119 - Minimizing redundancy for stuck bit coding (2025-10-21),

2. 12362029 - Stuck bits encoding and decoding on a storage device (2025-07-15),

3. 11233528 - Method and apparatus for LDPC decoding using indexed messages (2022-01-25),

4. 10666295 - Mitigation of error correction failure due to trapping sets (2020-05-26),

5. 10263640 - Low density parity check (LDPC) decoder with pre-saturation compensation (2019-04-16),

6. 10177787 - Mitigation of error correction failure due to trapping sets (2019-01-08),

7. 9513982 - Methods and systems for reducing decoder error floor for an electronic non-volatile computer storage apparatus (2016-12-06),

8. 9354816 - Read policy for system data of solid state drives (2016-05-31),

9. 9319073 - Mitigation of write errors in multi-level cell flash memory through adaptive error correction code decoding (2016-04-19),

10. 9037945 - Generating partially sparse generator matrix for a quasi-cyclic low-density parity-check encoder (2015-05-19),

11. 8970976 - Systems and methods for data dependent inter-track interference cancellation (2015-03-03),

12. 8861113 - Noise predictive filter adaptation for inter-track interference cancellation (2014-10-14),

13. 8341506 - Techniques for correcting errors using iterative decoding (2012-12-25),

14. 8213229 - Error control in a flash memory device (2012-07-03),

15. 8209578 - Systems using low density parity check codes for correcting errors (2012-06-26),

Title: Ivana Djurdjevic: Innovator in Storage Technology

Introduction

Ivana Djurdjevic is a prominent inventor based in San Jose, California, known for her significant contributions to storage technology. With a remarkable portfolio of 18 patents, she has made strides in minimizing redundancy in data storage systems. Her innovative approaches have enhanced the efficiency and reliability of memory devices.

Latest Patents

Among her latest patents, one notable invention is focused on minimizing redundancy for stuck bit coding. This technology allows a storage device to reduce redundancy when writing messages to a memory device. The controller generates a set of masks that correspond to stuck bit values, ensuring that any two stuck message bits are effectively masked during the encoding process. Another significant patent involves stuck bits encoding and decoding on a storage device. This invention processes stuck bits information when writing and reading data, utilizing cyclic error-correcting codes to enhance data integrity.

Career Highlights

Ivana has worked with leading companies in the technology sector, including Seagate Technology and Hitachi Global Storage Technologies. Her experience in these organizations has allowed her to develop and refine her innovative ideas in storage solutions.

Collaborations

Throughout her career, Ivana has collaborated with notable professionals in her field, including Erich Franz Haratsch and Bruce Alexander Wilson. These partnerships have contributed to her success and the advancement of her inventions.

Conclusion

Ivana Djurdjevic's work in storage technology exemplifies her commitment to innovation and excellence. Her patents reflect her ability to solve complex problems in data storage, making her a valuable contributor to the field.

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