Inetaro Kurosawa

Title: Inetaro Kurosawa and Embedded Interconnect Technology

Introduction

Inetaro Kurosawa is an inventor based in Tokyo, Japan, associated with Adeia Semiconductor Bonding Technologies Inc. His patent work concerns interconnect structures that integrate metal traces into a dielectric element.

Latest Patents

Kurosawa is credited with 1 patent: “Structure and Method of Making Interconnect Element Having Metal Traces Embedded in Surface of Dielectric.” The invention describes a monolithic dielectric element with recesses on two opposing surfaces. Metal interconnect patterns are embedded in those recesses, while solid metal posts extend through the dielectric to connect patterns on the two sides. This structure provides a method for forming interconnect elements with conductive traces integrated into the dielectric surfaces.

Career Highlights

Kurosawa’s listed patent reflects work on semiconductor interconnect design and fabrication. By embedding metal patterns in a dielectric element and linking them with through-posts, the disclosed approach addresses how conductive paths can be arranged across opposing surfaces.

Collaborations

Kurosawa’s listed coworkers include Toku Yoshino and Tomoo Iijima. The available information identifies these professional associations but does not specify their roles in the patent.

Conclusion

Inetaro Kurosawa’s patent documents an interconnect design that combines embedded surface traces with solid posts passing through a dielectric element, highlighting his contribution to semiconductor packaging technology.