Suwon-si, South Korea

In Lee

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: In Lee. Retrieved from https://idiyas.com/inventor/in-lee-vlpxnkyx

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: In Lee: Semiconductor Packaging Inventor

Introduction

In Lee is an inventor based in Suwon-si, South Korea. His work includes semiconductor packaging, and he is associated with Samsung Electronics Ltd.

Latest Patents

Lee is credited with 1 patent, titled “Semiconductor package.” The invention describes a package with a substrate containing a wiring circuit and an interposer with an electrically connected interconnect circuit. Buffer chips and multiple chip stacks are arranged around the interposer, with the interconnect circuit connecting groups of semiconductor chips to the buffer chips. This configuration provides a structured approach to connecting several chip stacks within a semiconductor package.

Career Highlights

Lee’s listed patent reflects work in semiconductor packaging and chip interconnection. His association with Samsung Electronics Ltd. places this work within the company’s semiconductor technology activities.

Collaborations

Lee’s identified coworker is Joonghyun Baek. The available information does not specify the nature or scope of their collaboration.

Conclusion

In Lee’s recorded invention focuses on connecting multiple chip stacks through an interposer-based semiconductor package, highlighting his contribution to semiconductor packaging technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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