Del Mar, CA, United States of America

Ian Galton

This inventor holds 22 USPTO granted patents and 1 EPO patent, primarily in Digital Signal Processing. Top assignees: University of California, Qualcomm Incorporated, Silicon Wave, Inc.. Active years: 1994-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ian Galton. Retrieved from https://idiyas.com/inventor/ian-galton

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 86.4

 

Average Co-Inventor Count = 1.7

ph-index = 12

Forward Citations = 444(Granted Patents)


Location History:

  • Irvine, CA (US) (1994)
  • Del Mar, CA (US) (2002 - 2022)

Company Filing History:


Years Active: 1994-2026

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Areas of Expertise:
Digital Fractional-N PLLs
Phase-Locked Loops
Analog-to-Digital Converters
Noise Cancellation Techniques
Delta-Sigma Modulators
Wide Tuning Range VCO
Mismatch Noise Cancellation
High-Speed DACs
Frequency Conversion Methods
Digital Background Correction
Inter-Symbol Interference
Dynamic Element Matching
22 patents (USPTO):Explore Patents

Title: Ian Galton: Innovator in Digital Conversion Technologies

Introduction

Ian Galton, a prominent inventor and innovator based in Del Mar, California, has made significant contributions to the field of digital conversion technologies with a total of 20 patents to his name. His work encompasses advanced methods for frequency to digital conversion, asynchronous sampling, and digital control techniques that have great implications for modern electronic systems.

Latest Patents

Among Ian's latest patents are groundbreaking technologies that include a frequency to digital converter that utilizes digital feedback to enhance operational efficiency. This innovation reduces implementation complexity significantly by employing a ring phase calculator to produce the converter's output. His methods also integrate digital gain correction in dual-mode ring oscillator converters and charge pump converters, compensating for gain errors without requiring analog adjustments. Furthermore, Ian introduced asynchronous sampling techniques equipped with correction logic to address arbitrary initial conditions, and a digitally-controlled oscillator (DCO) method that modulates frequency changes incrementally for improved stability.

Additionally, he has developed a digital fractional-N phase locked loop (PLL) which features multi-rate dynamic element matching (DEM) and an adaptive mismatch-noise cancellation (MNC) system. This PLL design focuses on minimizing quantization noise through a refined phase error-to-digital conversion and driving a DCO with a multi-rate DEM encoder. The innovative logic behind the adaptive mismatch-noise cancellation effectively reduces phase errors caused by frequency control element mismatches, leading to significantly more accurate digital oscillation.

Career Highlights

Throughout his career, Ian has been associated with several notable organizations, including the University of California and Qualcomm Incorporated. His experience in these prestigious institutions has greatly influenced the development of his patents and has allowed him to remain at the forefront of technology in his field.

Collaborations

Ian has collaborated with esteemed professionals such as Ashok Swaminathan and Peter M. Asbeck. These partnerships have facilitated the exchange of ideas and innovations, further enhancing the progress and application of Ian's work in digital conversion technologies.

Conclusion

Ian Galton remains a pivotal figure in the realm of digital innovation, with a keen focus on enhancing the functionality and efficiency of electronic systems through his inventive solutions. His ongoing contributions continue to shape the future of technology, reflecting the impact that a dedicated inventor can have on the ever-evolving electronics landscape.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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