Wonju-si, South Korea

Hyo Sik Ham

This inventor holds 1 USPTO granted patent. Top assignee: Auros Technology, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hyo Sik Ham. Retrieved from https://idiyas.com/inventor/hyo-sik-ham-6r6jadtn

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Hyo Sik Ham and Precision Overlay Measurement

Introduction

Hyo Sik Ham is an inventor associated with Auros Technology, Inc. in Wonju-si, South Korea. His patent work addresses overlay measurement, a key process for assessing the alignment of patterns formed on semiconductor wafers.

Latest Patents

The provided information lists one patent for Ham: “Overlay Measurement Apparatus and Overlay Measurement Method.” The invention describes an apparatus with an illumination source, an objective lens and focus actuator, an image-detection unit, a wafer stage, and a control unit. The system processes an image of an overlay target alongside a corresponding image rotated by 180 degrees, then calculates the difference between the processed images as a correction image. This correction can be used to improve the image used for overlay measurement. Ham is credited with 1 patent in the supplied data.

Career Highlights

Ham’s listed patent reflects work on imaging and measurement techniques for semiconductor manufacturing. The disclosed method uses paired, oppositely oriented images to derive a correction that supports more reliable overlay analysis.

Collaborations

Ham is associated with Auros Technology, Inc. His listed coworker is Seong Yun Choi, who is a woman. The supplied information does not specify her role in the patent or the nature of their collaboration.

Conclusion

Hyo Sik Ham’s listed invention focuses on correcting images used to measure wafer overlay, contributing a practical approach to precision in semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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