Hyeonseok Lee

Title: Hyeonseok Lee: Innovator in Semiconductor Technology

Introduction

Hyeonseok Lee is a prominent inventor based in Anyang-si, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 5 patents. His work focuses on innovative semiconductor packages that enhance performance and efficiency.

Latest Patents

Hyeonseok Lee's latest patents include a groundbreaking semiconductor package design. This design features a redistribution substrate with first and second surfaces, a first semiconductor chip on the first surface, and external terminals on the second surface. Additionally, it incorporates a second semiconductor chip positioned above the first semiconductor chip, along with external connection members and conductive pillars that electrically connect the external connection members to the redistribution substrate. The second semiconductor chip is composed of a device layer, a wiring layer, and a redistribution layer on a semiconductor substrate. The wiring layer includes intermetallic dielectric layers, wiring lines, and a conductive pad connected to the uppermost wiring line. The redistribution layer consists of a first redistribution dielectric layer, a first redistribution pattern, and a second redistribution dielectric layer. Notably, the vertical distance between the semiconductor substrate and the conductive pillars is less than that between the first semiconductor chip and the external terminals.

Another significant patent involves semiconductor packages and their fabrication methods. This patent describes a semiconductor package that comprises a redistribution substrate, a semiconductor chip on the top surface of the redistribution substrate, and a solder terminal on the bottom surface. The redistribution substrate features an under-bump pattern in contact with the solder terminal, a dielectric layer on the sidewall of the under-bump pattern, and a redistribution pattern on the under-bump pattern. The under-bump pattern has central and edge regions, with the first top surface at the edge region being higher than the second top surface at the central region. The angle between the bottom surface and the sidewall of the under-bump pattern is specified to be in the range of 110° to 140°.

Career Highlights

Hyeonseok Lee is currently employed at Samsung Electronics Co., Ltd., a leading company in the electronics industry. His work at Samsung has allowed him to push the boundaries of semiconductor technology and contribute to the development of advanced electronic devices.

Collaborations

Throughout his career, Hyeonseok Lee has collaborated with talented individuals such as Jongyoun Kim and Minjun B