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For the Inventor, By the Inventor

Hwaseong, South Korea

Hwa-Sook Shin

This inventor holds 13 USPTO granted patents. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2003-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hwa-Sook Shin. Retrieved from https://idiyas.com/inventor/hwa-sook-shin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 13

% Patents Active = 53.8

Average Co-Inventor Count = 1.9

ph-index = 5

Forward Citations = 88(Granted Patents)


Location History:

  • Suwon, KR (2003 - 2004)
  • Suwon-shi, JP (2005)
  • Suwon, JP (2005)
  • Suwon-shi, KR (2004 - 2007)
  • Gyeonggi-do, KR (2007)
  • Suwon-si, KR (2008 - 2013)
  • Hwaseong-si, KR (2014 - 2015)

Company Filing History:

goldMedal13 out of 132,108 
 
Samsung Electronics Co., Ltd.
 patents

Years Active: 2003-2015

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13 patents (USPTO):Explore Patents
1. 9117655 - Semiconductor device (2015-08-25),
2. 8760192 - Programmable circuit including differential amplifier circuit (2014-06-24),
3. 8749022 - Capacitor device and method of fabricating the same (2014-06-10),
4. 8507967 - Method of fabricating semiconductor device having storage capacitor and higher voltage resistance capacitor and semiconductor device fabricated using the same (2013-08-13),
5. 7517752 - Method of fabricating semiconductor device having storage capacitor and higher voltage resistance capacitor and semiconductor device fabricated using the same (2009-04-14),
6. 7446387 - High voltage transistor and methods of manufacturing the same (2008-11-04),
7. 7297604 - Semiconductor device having dual isolation structure and method of fabricating the same (2007-11-20),
8. 7211515 - Methods of forming silicide layers on source/drain regions of MOS transistors (2007-05-01),
9. 6927452 - Semiconductor device having dual isolation structure and method of fabricating the same (2005-08-09),
10. 6924530 - Double diffused MOS transistor and method for manufacturing same (2005-08-02),
11. 6815794 - Semiconductor devices with multiple isolation structure and methods for fabricating the same (2004-11-09),
12. 6773995 - Double diffused MOS transistor and method for manufacturing same (2004-08-10),
13. 6635536 - Method for manufacturing semiconductor memory device (2003-10-21),

Title: Hwa-Sook Shin: Innovator in Semiconductor Technology

Introduction

Hwa-Sook Shin is a prominent inventor based in Hwaseong-si, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 13 patents. His work has been instrumental in advancing the capabilities of electronic devices.

Latest Patents

One of Hwa-Sook Shin's latest patents is a semiconductor device that features a main active region within a semiconductor substrate. This device includes a first auxiliary active region and a second auxiliary active region, both strategically positioned to enhance performance. Another notable patent is a programmable circuit that includes two parallel paths, each containing programmable elements and transistors, designed to optimize voltage management.

Career Highlights

Hwa-Sook Shin is currently employed at Samsung Electronics Co., Ltd., where he continues to innovate and develop cutting-edge technologies. His expertise in semiconductor devices and programmable circuits has positioned him as a key player in the industry.

Collaborations

Throughout his career, Hwa-Sook Shin has collaborated with talented individuals such as Dong-Ryul Chang and Soo-cheol Lee. These partnerships have fostered a creative environment that encourages innovation and the development of new technologies.

Conclusion

Hwa-Sook Shin's contributions to semiconductor technology and his impressive portfolio of patents highlight his role as a leading inventor in the field. His work continues to influence the future of electronic devices and systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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