This inventor holds 1 USPTO granted patent. Top assignee: Skyechip Berhad. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: How Hwan Wong: Memory-System Timing Innovation.
Introduction
How Hwan Wong is an inventor based in Bayan Lepas, Malaysia. His patent work addresses clock timing in memory systems, with a design intended to support precise clock delivery to transceivers.
Latest Patents
Wong is associated with 1 patent, titled “Digital Delay Line of a Memory System and Method of Adjusting Timing of Clocks Using Thereof.” The invention describes a digital delay line with coarse and fine delay stages. The coarse stage divides and delays a high-speed input clock, using a dual-edge-triggered flip-flop to produce a shifted divided clock and a clock multiplexer to bypass the input clock when shifting is unnecessary. The fine stage provides smaller delay steps and transmits an interface output clock to transceivers. The patent also describes a method for adjusting clock timing in a memory system using this digital delay line.
Career Highlights
Wong is associated with SkyeChip Berhad. His disclosed patent focuses on clock management, an important aspect of coordinating timing between memory systems and connected transceivers.
Collaborations
Hoong Chin Ng is identified as Wong’s coworker. The available information does not specify whether Ng collaborated on the patent.
Conclusion
How Hwan Wong’s patent presents a two-stage digital delay-line approach for adjusting clock timing in memory systems, reflecting his work in this area of technology.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile