The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2026
Filed:
Sep. 17, 2024
Skyechip Berhad, Bayan Lepas, MY;
Hoong Chin Ng, Bayan Lepas, MY;
How Hwan Wong, Bayan Lepas, MY;
SKYECHIP BERHAD, , MY;
Abstract
The invention relates to a digital delay line of a memory system is characterized by: a coarse delay line receiving a high-speed input clock; and a fine delay line transmitting an interface output clock to transceivers; wherein the coarse delay line is configured to perform clock division from a frequency of the high-speed input clock to a frequency of the interface output clock and to delay divided output clock; wherein the coarse delay line comprising a dual-edge triggered flip-flop to produce a shifted divided clock and a clock mux to bypass the high-speed input clock when delay shifting is not needed; wherein the fine delay line is configured to provide a finer delay step size. Further, a method of adjusting the timing of clocks within a memory system using a digital delay line of a memory system is also disclosed.