This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Co., Ltd.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: The Innovations of Hou-Yu Chen
Introduction
Hou-Yu Chen is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology. His innovative work has led to the development of a unique patent that enhances transistor design.
Latest Patents
One of Hou-Yu Chen's notable patents is for a "Vertical self-aligned gate all around transistor." This invention outlines a method for forming vertical gate all around transistors. The process includes forming a stack of semiconductor layers on a lower source/drain region. The stack consists of a first layer, a second layer on the first layer, and a third layer on the second layer. The first and third layers have substantially identical compositions and are selectively etchable with respect to the second layer. The first and second layers can be selectively removed and replaced with inner spacers. Additionally, the second layer can be selectively removed and replaced with a gate electrode. This innovative approach has the potential to improve the performance and efficiency of transistors.
Career Highlights
Hou-Yu Chen is currently employed at Taiwan Semiconductor Manufacturing Co., Ltd. His work at this leading semiconductor company has allowed him to collaborate with other talented professionals in the industry.
Collaborations
Some of his notable coworkers include Yu-Xuan Huang and Cheng-Ting Chung. Their collective expertise contributes to the advancement of semiconductor technologies.
Conclusion
Hou-Yu Chen's contributions to the field of semiconductor technology, particularly through his innovative patent, demonstrate his commitment to advancing the industry. His work continues to influence the development of more efficient transistor designs.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile