Suzhou, China

Hongjie Wang

This inventor holds 1 USPTO granted patent. Top assignee: Suzhou Tf-Amd Semiconductor Co. Ltd.. Active years: 2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hongjie Wang. Retrieved from https://idiyas.com/inventor/hongjie-wang-2j6d1qt3

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2022

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1 patent (USPTO):Explore Patents

Title: The Innovations of Hongjie Wang

Introduction: Hongjie Wang is a prominent inventor based in Suzhou, China. He has made significant contributions to the field of semiconductor technology. His work focuses on innovative packaging structures that enhance the performance and reliability of electronic components.

Latest Patents: One of Hongjie Wang's notable patents is titled "Structure for capacitor protection, package structure, and method of forming package structure." This patent describes a package structure that includes a substrate, a chip arranged on a part of the surface of the substrate, and a metal thermal conducting layer on the chip's top surface. Additionally, it features a capacitive structure that is independent of the chip and a cover with two layers. The design allows for efficient thermal management and protection of the capacitor, showcasing Wang's innovative approach to semiconductor packaging. He holds 1 patent.

Career Highlights: Hongjie Wang is currently employed at Suzhou Tf-amd Semiconductor Co. Ltd. His work at the company has been instrumental in advancing semiconductor technologies. He has collaborated with talented individuals in the field, including Zhe Liu and Borrong Huang.

Collaborations:

Conclusion: Hongjie Wang's contributions to semiconductor technology through his innovative patents and collaborations highlight his role as a leading inventor in the industry. His work continues to influence advancements in electronic component design and packaging.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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