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For the Inventor, By the Inventor

Princeton, NJ, United States of America

Hong Shan Neoh

This inventor holds 7 USPTO granted patents. Top assignees: Altera Corporation, Intel Corporation. Active years: 2009-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hong Shan Neoh. Retrieved from https://idiyas.com/inventor/hong-shan-neoh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7

% Patents Active = 57.1

Average Co-Inventor Count = 1.3

ph-index = 2

Forward Citations = 33(Granted Patents)


Location History:

  • Princeton, NJ (US) (2009 - 2012)
  • Redwood City, CA (US) (2012 - 2014)
  • San Carlos, CA (US) (2024)

Company Filing History:

goldMedal6 out of 4,333 
 
Altera Corporation
 patents
silverMedal1 out of 56,322 
 
Intel Corporation
 patents

Years Active: 2009-2025

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7 patents (USPTO):Explore Patents
1. 12373170 - Techniques for transposing a matrix using a memory block (2025-07-29),
2. 11928443 - Techniques for transposing a matrix using a memory block (2024-03-12),
3. 8689153 - M and A for importing hardware description language into a system level design environment (2014-04-01),
4. 8289195 - Fractional rate resampling filter on FPGA (2012-10-16),
5. 8156452 - Method and apparatus for importing hardware description language into a system level design environment (2012-04-10),
6. 7949699 - Implementation of decimation filter in integrated circuit device using ram-based data storage (2011-05-24),
7. 7598790 - Clock synthesis using polyphase numerically controlled oscillator (2009-10-06),
Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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