Hwaseong, South Korea

Hoi-Ju Chung

This inventor holds 2 USPTO granted patents. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2018-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hoi-Ju Chung. Retrieved from https://idiyas.com/inventor/hoi-ju-chung-e6oixtrh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 7(Granted Patents)


Company Filing History:


Years Active: 2018-2019

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2 patents (USPTO):Explore Patents

Title: Hoi-Ju Chung: Innovator in Semiconductor Memory Technology

Introduction

Hoi-Ju Chung is a prominent inventor based in Hwaseong, South Korea. He has made significant contributions to the field of semiconductor memory devices, holding a total of 2 patents. His work focuses on enhancing the reliability and efficiency of memory technology.

Latest Patents

Chung's latest patents include innovative methods for operating semiconductor memory devices with selective write-back of data for error scrubbing. This method involves accessing a page of the memory cell array to provide data that includes sub-units that are separately writable. It also includes providing parity data configured to detect and correct bit errors in the data. The selective enabling of write-back for a chosen sub-unit of data occurs when a correctable error is detected during an error scrubbing operation.

Career Highlights

Hoi-Ju Chung is currently employed at Samsung Electronics Co., Ltd., where he continues to push the boundaries of semiconductor technology. His expertise in memory devices has positioned him as a key player in the industry.

Collaborations

Chung has collaborated with notable colleagues, including Uk-Song Kang and Sang-Uhn Cha, contributing to advancements in semiconductor technology.

Conclusion

Hoi-Ju Chung's innovative work in semiconductor memory technology exemplifies the importance of research and development in enhancing device reliability. His contributions continue to shape the future of memory technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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