Ho-Jeong Moon

Title: Ho-Jeong Moon: Innovator in Semiconductor Reliability Testing

Introduction

Ho-Jeong Moon is an inventor based in Hwasung-City, South Korea. He has made significant contributions to the field of semiconductor reliability testing. His innovative approach focuses on improving the methods used to assess the reliability of semiconductor packages.

Latest Patent Applications

Ho-Jeong Moon's notable patent application is titled "METHOD OF CONDUCTING PRECONDITIONED RELIABILITY TEST OF SEMICONDUCTOR PACKAGE USING CONVECTION AND 3-D IMAGING." This application outlines a precondition reliability test designed to determine the propensity of semiconductor packages to delaminate. The method includes a series of tests: a baking test for drying the package, a moisture soaking test for moisturizing the dried package, and a reflow test that involves heat-treating the moisturized package using hot air convection. Additionally, the application describes the use of three-dimensional imaging, preferably through Moire interferometry, to observe delamination in real time. This innovative approach allows for the collection of data that can be organized as a Weibull Plot, facilitating a quantitative analysis of the reliability test results.

Conclusion

Ho-Jeong Moon's work in semiconductor reliability testing showcases his commitment to advancing technology in this critical field. His innovative methods have the potential to enhance the understanding of semiconductor package reliability and improve industry standards.