Ome, Japan

Hiroshi Otori

This inventor holds 21 USPTO granted patents, primarily in Semiconductor Technology. Top assignees: Hitachi, Ltd., Texas Instruments Corporation, Hitachi Ltd, of Japan. Active years: 1995-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiroshi Otori. Retrieved from https://idiyas.com/inventor/hiroshi-otori

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 81.0

Average Co-Inventor Count = 5.1

ph-index = 7

Forward Citations = 202(Granted Patents)


Location History:

  • Ohme, JP (1995)
  • Plano, TX (US) (1997)
  • Ome, JP (1998 - 2007)
  • Mizuho, JP (2002 - 2008)
  • Tokyo, JP (2003 - 2008)

Company Filing History:


Years Active: 1995-2008

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Areas of Expertise:
Semiconductor Memory
Integrated Circuit
Power Management
Dynamic RAM
Memory Regulator
Signal Buses
Redundant Memory Cells
Sense Amplifier
Fabrication Method
Cell Array
Variable Voltage
21 patents (USPTO):Explore Patents

Title: Hiroshi Otori: Innovator in Semiconductor Technology

Introduction

Hiroshi Otori is a renowned inventor based in Ome, Japan, with an impressive portfolio of 21 patents. His significant contributions to the field of semiconductor technology have established him as a leading figure in the industry.

Latest Patents

Otori's latest innovations include two groundbreaking patents focused on semiconductor memory devices. The first patent details a semiconductor memory device that caters to the demand for both a large number of memory banks and high operational speed. This innovative device features a plurality of data terminal pads and memory banks that are independently accessible. Each memory bank is further divided into submemory banks, with data terminal pads organized into groups associated with these subdivisions. The layout of these blocks on the semiconductor chip is designed to prevent overlap, enhancing performance.

His second patent presents a method and apparatus for a meshed power and signal bus system on array-type integrated circuits. This design minimizes circuit size by implementing through-holes in the cell array as well as the peripheral circuits. The power and signal buses traverse both vertical and horizontal directions, ensuring that all vertical buses occupy one metal layer while horizontal buses reside in another metal layer. The improved hierarchical word line structure in the subdecoder circuit facilitates this efficient connection to sense amplifier drivers.

Career Highlights

Hiroshi Otori has had a notable career with significant roles in industry-leading companies, including Hitachi, Ltd. and Texas Instruments Corporation. His experience in these organizations has allowed him to apply his inventive insights and contribute to advancements in semiconductor technology.

Collaborations

Throughout his career, Otori has worked alongside esteemed colleagues such as Takesada Akiba and Goro Kitsukawa. These collaborations have undoubtedly enriched his work, fostering an environment of innovation and knowledge exchange.

Conclusion

Hiroshi Otori's contributions to semiconductor technology through his extensive patent portfolio underline his status as a pivotal inventor in the field. His work continues to influence advancements that meet the evolving demands of technology, securing a legacy of innovation for future generations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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