Tokyo, Japan

Hiroo Tamura

This inventor holds 3 USPTO granted patents and 3 published patent applications. Top assignee: Tokyo Seimitsu Co., Ltd.. Active years: 2019-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiroo Tamura. Retrieved from https://idiyas.com/inventor/hiroo-tamura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 1.4

ph-index = 1

Forward Citations = 13(Granted Patents)


Company Filing History:


Years Active: 2019-2020

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3 patents (USPTO):Explore Patents

Title: Innovator Hiroo Tamura and His Breakthrough Patents

Introduction

Hiroo Tamura is a notable inventor based in Tokyo, Japan, recognized for his contributions to semiconductor technology. With a total of three patents under his name, Tamura's innovations have played a significant role in advancing the efficiency and accuracy of semiconductor inspection processes.

Latest Patents

One of Tamura's latest inventions is a positioning and fixing device designed to enhance a prober's performance. This device is capable of reducing installation area and costs while improving throughput, all without compromising the accuracy of the alignment device's moving position. The prober includes several measuring units, each equipped with a probe card connected to a test head, a wafer chuck to hold the wafer, and an alignment device for relative alignment tasks. A moving device facilitates the movement of the alignment device among different measuring units, while the positioning and fixing device ensures precise positioning and stability during operations.

Another significant patent relates to the design of a prober that addresses the Abbe error, a critical factor in achieving high accuracy in positioning. This invention comprises multiple measurement sections positioned between conveyance and maintenance areas, where each section has a device for inspecting semiconductor elements on a wafer. A draw-out mechanism allows easy maintenance of the devices, optimizing the overall efficiency of the inspection process by enabling seamless loading of objects from both the conveyance and maintenance areas.

Career Highlights

Hiroo Tamura has made substantial contributions to the field of semiconductor technology, working diligently in his role at Tokyo Seimitsu Co., Ltd. His inventive spirit and technical expertise have led to advancements that enhance both the functionality and efficiency of semiconductor testing equipment.

Collaborations

Tamura collaborates with esteemed colleagues, including Katsura Tomotaki and Yoshiyuki Yokoyama. This teamwork has fostered a creative environment that encourages innovation and has led to impactful developments in their respective projects.

Conclusion

Hiroo Tamura's work exemplifies the importance of innovation in the semiconductor industry. With his latest patents focusing on enhancing the accuracy and efficiency of probing systems, Tamura continues to be a key player in shaping the future of semiconductor technology in Japan and beyond. His contributions are vital not only to his company but also to the advancement of the industry as a whole.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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