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Yokohama, Japan

Hiroki Yada

This inventor holds 2 USPTO granted patents. Top assignee: Fujitsu Corporation. Active years: 1992-1993.

USPTO Granted Patents = 2

% Patents Active = 100.0

Average Co-Inventor Count = 6.9

ph-index = 2

Forward Citations = 12(Granted Patents)

Location History:

Yokohama, JP (1992)
Chigasaki, JP (1993)

Company Filing History:

2 out of 39,371

Fujitsu Corporation

Years Active: 1992-1993

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2 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 5216296 - Logic circuit having sharper falling edge transition (1993-06-01),

2. 5144158 - ECL latch circuit having a noise resistance circuit in only one feedback (1992-09-01),

Profile summary based on public USPTO records.

Please report any incorrect information to [email protected]

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