Hiral Nandu

Title: Hiral Nandu: Innovator in Data Processing Technologies

Introduction

Hiral Nandu is a prominent inventor based in South San Francisco, CA. She has made significant contributions to the field of data processing technologies, holding a total of 2 patents. Her work focuses on enhancing the efficiency and effectiveness of graphics processing units (GPUs) and cache replacement policies.

Latest Patents

Hiral Nandu's latest patents include "Physical address based set partitioning" and "Multimedia compressed frame aware cache replacement policy." The first patent presents methods and devices for data or graphics processing, including an apparatus that configures an address range in a cache. This apparatus is designed to optimize data access by selecting updated address values for set indexes, thereby improving data allocation efficiency. The second patent introduces a criterion-aware cache replacement policy, which utilizes a staling counter to determine the freshness of data in the system cache. This innovation aims to enhance the performance of computing devices by ensuring that the most relevant data is readily accessible.

Career Highlights

Hiral Nandu is currently employed at Qualcomm Incorporated, a leading company in the telecommunications and semiconductor industry. Her role involves developing advanced technologies that push the boundaries of data processing capabilities.

Collaborations

Throughout her career, Hiral has collaborated with notable colleagues, including Subbarao Palacharla and George Patsilaras. These collaborations have contributed to her innovative work and the successful development of her patents.

Conclusion

Hiral Nandu's contributions to data processing technologies exemplify her dedication to innovation and excellence in her field. Her patents reflect her commitment to improving the efficiency of computing systems, making her a valuable asset to Qualcomm Incorporated and the broader technology community.