The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2026
Filed:
Dec. 11, 2024
Qualcomm Incorporated, San Diego, CA (US);
Vijay Jonnalagadda, San Diego, CA (US);
Pankaj Kumar Sharma, Bangalore, IN;
Madhusudhana Reddy Lebaka, Bangalore, IN;
Wesley James Holland, Encinitas, CA (US);
Anirudh Ghayal, Secunderabad, IN;
Venkatesh Ravipati, Guntur, IN;
Jimit Shah, Bangalore, IN;
Girish Bhat, San Diego, CA (US);
Subbarao Palacharla, San Diego, CA (US);
Hiral Nandu, South San Francisco, CA (US);
Shubham Agarwal, Bangalore, IN;
Lakshmi Narayana Panuku, Hyderabad, IN;
Qualcomm Incorporated, San Diego, CA (US);
Abstract
Power control in a computing device may include timing a periodic time interval associated with intervals of memory accesses by a first processor alternating with intervals of inactivity of the first processor, and powering down memory controller circuitry during the intervals of first processor inactivity while maintaining power supplied to a system-level cache. Maintaining the power supplied to the system-level cache may allow a second processor to continue accessing the system-level cache even while the memory controller circuitry is powered down. Power may be restored to the memory controller circuitry during the intervals of memory access by the first processor.