San Diego, CA, United States of America

Girish Bhat

This inventor holds 17 USPTO granted patents and 4 published patent applications and 3 EPO patents, primarily in Memory Systems. Top assignees: Fortinet, Inc., Qualcomm Incorporated. Active years: 2009-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Girish Bhat. Retrieved from https://idiyas.com/inventor/girish-bhat

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 17 

% Patents Active = 64.7

 

Average Co-Inventor Count = 4.9

ph-index = 5

Forward Citations = 101(Granted Patents)


Company Filing History:


Years Active: 2009-2026

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Areas of Expertise:
Reprojection Information
Memory Power Collapse
Error Handling
Shared Memory Systems
Cache Replacement Policy
Integrated Circuits
Access Control System
Multicast Forwarding
Debug Data Preservation
Low-Power Memory
Resource Utilization
17 patents (USPTO):Explore Patents

Title: Innovations by Girish Bhat: A Pioneer in Cache Memory Technologies

Introduction

Girish Bhat is a remarkable inventor based in San Diego, California, known for his contributions to the field of computer engineering. With a total of 13 patents to his name, Bhat has significantly impacted innovation, particularly in cache memory technologies and integrated circuits.

Latest Patents

One of his latest innovations is a patent for a "Multimedia Compressed Frame Aware Cache Replacement Policy." This invention includes various methods and devices for implementing a criterion-aware cache replacement policy by a computing device. The approach features updating a staling counter and writing a value of a local counter to a system cache associated with specific data. This invention allows for determining whether the associated data is stale, thereby improving cache management efficiency.

Additionally, he holds a patent titled "Integrated Circuits Employing Subsystem Shared Cache Memory for Facilitating Extension of Low-Power Island Memory and Related Methods." This invention describes the use of integrated circuits that employ shared cache memory to extend low-power island memory (LPI). In this setup, the primary subsystems and the LPI subsystem access a memory subsystem in different power modes to optimize memory access and prolong device longevity.

Career Highlights

Throughout his career, Girish Bhat has worked with esteemed organizations, including Fortinet, Inc., a leader in cybersecurity solutions, and Qualcomm Incorporated, known for its advancements in wireless technology. His experience at these companies has contributed to his solid understanding of technology and innovation.

Collaborations

Bhat has collaborated with notable individuals in the industry, including Rajesh I Balay and Gregory Lockwood. Together, they have contributed to the development of technologies that redefine how memory systems operate in various computing devices.

Conclusion

Girish Bhat's body of work showcases his dedication to technological innovation and excellence in the realm of cache memory and integrated circuits. His contributions not only reflect his expertise as an inventor but also pave the way for future advancements in the technology sector. As he continues to innovate, Bhat's impact on the industry is sure to grow, inspiring future generations of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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