Tokyo, Japan

Hideo Yoshida

This inventor holds 78 USPTO granted patents and 10 published patent applications, plus 2 CIPO patents and 24 EPO patents, primarily in Error Correction Coding (CPC class H03M). Top assignees: Mitsubishi Electric Corporation, Mitsubishi Denki Kabushiki Kaisha, Sumitomo Light Metal Industries, Ltd.. Active years: 1983-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hideo Yoshida. Retrieved from https://idiyas.com/inventor/hideo-yoshida

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 78 

% Patents Active = 83.3


 

Average Co-Inventor Count = 2.5

ph-index = 16

Forward Citations = 851(Granted Patents)

Forward Citations (Not Self Cited) = 826(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Aichi, JP (1999)
  • Omiya-shi, Saitama JP (2001)
  • Nagoya, JP (1983 - 2002)
  • Kamakura, JP (1989 - 2002)
  • Tokorozawa-shi, Saitama, JP (2008)
  • Fujisawa, JP (2016 - 2018)
  • Chiyoda-ku, JP (2012 - 2021)
  • Kanagawa, JP (1990 - 2022)
  • Tokyo, JP (1985 - 2024)

Company Filing History:


Years Active: 1983-2025

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Areas of Expertise:
Error Correction Coding
Optical Transmission
Electric Vehicle System
Decoding Apparatus
Communication System
Transmitter
Receiver
Coding Device
Error Correcting Method
Control Circuit
Data Transmission
Likelihood Generation
78 patents (USPTO):Explore Patents

Title: Innovations and Contributions of Hideo Yoshida in Error Correction Technologies

Introduction

Hideo Yoshida is a notable inventor based in Tokyo, Japan, renowned for his contributions to error correction coding technologies. With an impressive portfolio of 76 patents, Yoshida has played a pivotal role in advancing the field of telecommunications and data transmission.

Latest Patents

Yoshida's latest patents include groundbreaking inventions focused on error correction coding apparatus and decoding apparatus. His error correction coding apparatus leverages a frame of m bits × n symbols, performing error correction coding through an innovative circuit that generates parity bits from known bits in the input sequence. Additionally, he designed a decoding apparatus that entails an iterative decoding process, utilizing a spatially coupled low-density parity-check code. This system dynamically updates decoding parameters based on the results of its operations, enhancing error correction efficiency.

Career Highlights

Throughout his career, Hideo Yoshida has worked with esteemed companies such as Mitsubishi Electric Corporation and Mitsubishi Denki Kabushiki Kaisha. His expertise and innovation at these organizations have significantly impacted the development of sophisticated error correction technologies, essential for ensuring reliable data communication.

Collaborations

In his journey, Yoshida has collaborated with fellow experts in the field, including Yoshikuni Miyata and Kazuo Kubo. These partnerships have further enriched his projects, leading to advancements that continue to influence contemporary data processing methods.

Conclusion

Hideo Yoshida's contributions to error correction technologies illustrate the profound impact that dedicated inventors can have on modern communications. His innovative patents not only showcase his technical prowess but also underline the continuous evolution of error correction methods essential for today's data-centric world.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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