San Jose, CA, United States of America

Helena H Nguyen

This inventor holds 1 USPTO granted patent. Top assignee: Infineon Technologies Ag. Active years: 2005.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Helena H Nguyen. Retrieved from https://idiyas.com/inventor/helena-h-nguyen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 23(Granted Patents)


Company Filing History:


Years Active: 2005

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1 patent (USPTO):Explore Patents

Title: Helena H. Nguyen and Her Standard-Cell Library Patent

Introduction

Helena H. Nguyen is an inventor associated with San Jose, California, and Infineon Technologies AG. Her patent work concerns semiconductor circuit design, specifically the layout of standard cells for advanced fabrication technologies.

Latest Patents

Nguyen is credited with 1 patent: “7-tracks standard cell library.” The invention describes a standard-cell layout architecture for fabrication technologies with design rules of 0.12 microns or smaller. It uses a routing grid with horizontal and vertical spacings of 0.4 microns, producing a cell height of 2.8 microns across seven tracks.

The design divides the cell height into four tracks on the P-side and three on the N-side, with power rails implemented using M1 structures. For complex cells, an internal connection line made with the third metal layer, M3, is placed in a predetermined track to support the seven-track layout.

Career Highlights

The patent reflects Nguyen’s contribution to semiconductor layout design, where cell architecture and routing choices can support compact, manufacturable circuit designs. The available information associates her with Infineon Technologies AG.

Collaborations

Nguyen’s listed coworkers include Larry Lam Chau and Trang Pham. The provided information does not specify their roles in the patent or the nature of their collaboration.

Conclusion

Helena H. Nguyen’s patent documents a seven-track standard-cell architecture designed to organize routing and power structures for fine-scale semiconductor fabrication.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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