The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 30, 2005
Filed:
Jan. 17, 2003
Helena H. Nguyen, San Jose, CA (US);
Larry L. Chau, Fremont, CA (US);
Trang Pham, Milpitas, CA (US);
Tam Dinh Thanh Nguyen, Fremont, CA (US);
Helena H. Nguyen, San Jose, CA (US);
Larry L. Chau, Fremont, CA (US);
Trang Pham, Milpitas, CA (US);
Tam Dinh Thanh Nguyen, Fremont, CA (US);
Infineon Technologies AG, Munich, DE;
Abstract
A 7-track standard cell library having a layout architecture that is designed for fabrication technologies having design rules of 0.12 microns or smaller. The cells are laid out using a routing grid having horizontal and vertical grid spacings of 0.4 microns, such that the height of each 7-track standard cell is 2.8 microns (i.e., seven track spacings based on a horizontal grid spacing of 0.4 microns). Power rails are implemented using M1 structures. The seven-track cell height is divided into four tracks on the P-side and three tracks on the N-side. Complex cells include one internal connection line (structure) formed using the third metal layer (M3) that is introduced in a predetermined track (e.g., the second track from the top of the cell) to facilitate the seven-track layout.