IDiyas

For the Inventor, By the Inventor

Osaka, Japan

Hazuki Okabayashi

USPTO Granted Patents = 10

Average Co-Inventor Count = 5.4

ph-index = 5

Forward Citations = 86(Granted Patents)


Location History:

  • Hirakata, JP (2007 - 2009)
  • Osaka, JP (2008 - 2011)
  • Kyoto, JP (2015)

Company Filing History:

goldMedal5 out of 16,453 
 
Panasonic Corporation
 patents
silverMedal4 out of 27,375 
 
Matsushita Electric Industrial Co., Ltd.
 patents
bronzeMedal1 out of 13,247 
 
Panasonic Intellectual Property Management Co., Ltd.
 patents

Years Active: 2007-2015

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10 patents (USPTO):Explore Patents
1. 9170841 - Multiprocessor system for comparing execution order of tasks to a failure pattern (2015-10-27),
2. 7970998 - Parallel caches operating in exclusive address ranges (2011-06-28),
3. 7953935 - Cache memory system, and control method therefor (2011-05-31),
4. 7594099 - Processor executing SIMD instructions (2009-09-22),
5. 7555610 - Cache memory and control method thereof (2009-06-30),
6. 7502887 - N-way set associative cache memory and control method thereof (2009-03-10),
7. 7454575 - Cache memory and its controlling method (2008-11-18),
8. 7380112 - Processor and compiler for decoding an instruction and executing the decoded instruction with conditional execution flags (2008-05-27),
9. 7281117 - Processor executing SIMD instructions (2007-10-09),
10. 7185176 - Processor executing SIMD instructions (2007-02-27),
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