San Diego, CA, United States of America

Harpreet Singh Anand

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Harpreet Singh Anand. Retrieved from https://idiyas.com/inventor/harpreet-singh-anand

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2019

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1 patent (USPTO):Explore Patents

Title: Harpreet Singh Anand: Innovator in Power Grid Optimization

Introduction

Harpreet Singh Anand is a notable inventor based in San Diego, California. He has made significant contributions to the field of integrated circuit design, particularly in optimizing power grids. His innovative approach addresses the complexities of modern power domains and integrated circuits.

Latest Patents

Harpreet Singh Anand holds a patent for "Optimizing a power grid for an integrated circuit." This invention relates to the creation of power grids for complex integrated circuits that feature multiple power domains, macros, and secondary power regions. The patent describes a power grid compiler that translates high-level descriptions into base-level commands, facilitating the implementation of wires and vias in the power grid. The high-level description utilizes a concise, process technology-dependent language that is independent of design or chip specifics. Additionally, the invention includes a power grid optimizer that enhances portions of the power grid based on analytics, allowing for incremental updates to include optimized sections.

Career Highlights

Harpreet Singh Anand is currently employed at Cadence Design Systems, Inc., where he applies his expertise in power grid optimization. His work is crucial in advancing the efficiency and performance of integrated circuits in various applications.

Collaborations

Some of his notable coworkers include Paul W Kollaritsch and Mohan Kumar Chalamalashatty. Their collaboration contributes to the innovative environment at Cadence Design Systems, Inc.

Conclusion

Harpreet Singh Anand's contributions to power grid optimization in integrated circuits highlight his role as a significant inventor in the field. His patent reflects a deep understanding of the complexities involved in modern electronic design, showcasing his innovative spirit and technical expertise.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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