Haobin Li

Title: Haobin Li - Innovator in Static Timing Analysis

Introduction

Haobin Li is a prominent inventor based in Sunnyvale, CA, known for his contributions to the field of static timing analysis for System on a Chip (SoC) designs. With a total of 2 patents, he has made significant strides in improving the efficiency and speed of timing analysis processes.

Latest Patents

One of Haobin Li's latest patents is a method and system for high speed and low memory footprint static timing analysis. This invention addresses a longstanding challenge in timing analysis by enabling multi-threading of the design under analysis. The method involves slicing a design into levels and further decomposing each level into gates, allowing for multi-threaded processing. This approach significantly accelerates the solution generation for large design analyses compared to traditional methods. Additionally, the invention ensures that only one level exists in RAM at any time, with computed data saved to disk immediately. This results in a memory footprint that is sub-linear to the size of the design, making it feasible to run entire SoC designs on affordable, off-the-shelf hardware.

Career Highlights

Haobin Li is currently employed at Synopsys, Inc., where he continues to develop innovative solutions in the field of electronic design automation. His work has been instrumental in advancing the capabilities of SoC design analysis.

Collaborations

Throughout his career, Haobin has collaborated with notable colleagues, including Guy Maor and Yuji Kukimoto, contributing to a dynamic and innovative work environment.

Conclusion

Haobin Li's contributions to static timing analysis have paved the way for more efficient and accessible SoC design processes. His innovative methods are set to have a lasting impact on the industry.