San Jose, CA, United States of America

Hao Jl

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hao Jl. Retrieved from https://idiyas.com/inventor/hao-jl

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 10(Granted Patents)


Company Filing History:


Years Active: 2012

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1 patent (USPTO):Explore Patents

Title: Hao Jl: Inventor in Semiconductor Design

Introduction

Hao Jl is an inventor associated with San Jose, California, and Cadence Design Systems, Inc. His patent work addresses methods for analyzing electrical properties in integrated-circuit design.

Latest Patents

The available information lists one patent for Hao Jl: “Method and System Performing RC Extraction.” The invention describes a method, system, and computer program product for performing resistance-capacitance (RC) extraction. It supports multiple manufacturing processes and uses location-based prediction data in net-based analysis. By applying net-specific top and bottom adjustments to thickness predictions, the approach aims to improve RC extraction accuracy. The resulting prediction data can also support electrical hotspot analysis, visual displays of net properties, and other data-analysis queries.

Career Highlights

Hao Jl’s listed patent connects his work at Cadence Design Systems, Inc. with semiconductor design analysis, particularly RC extraction and the use of location-based data to assess electrical characteristics.

Collaborations

The provided information identifies Li J Song and Zhan-Zhong Yao as Hao Jl’s coworkers. Their names are also associated with the collaborative context surrounding his patent work.

Conclusion

Hao Jl’s listed invention focuses on improving RC extraction through location-aware, net-specific predictions, with potential applications in electrical analysis and design visualization.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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