Han Ju Lee

Title: Innovations by Han Ju Lee

Introduction

Han Ju Lee is a notable inventor based in Santa Clara, CA. He has made significant contributions to the field of integrated circuits and field-programmable gate arrays. With a total of 2 patents, his work has had a considerable impact on technology.

Latest Patents

One of Han Ju Lee's latest patents is titled "Interlayer dielectric stack optimization for wafer bow reduction." This patent describes an integrated circuit (IC) die that includes a first metallization layer with first interconnect structures and a second metallization layer with second interconnect structures. The interlayer dielectric (ILD) stack between these layers comprises a stress modulation layer designed to mitigate intrinsic stress in the first metallization layer.

Another significant patent is focused on "Methods and apparatus to facilitate field-programmable gate array support during runtime execution of computer readable instructions." This invention includes a compiler that compiles high-level source code into hardware bitstream kernels, allowing for dynamic selection and dispatching of these kernels to a field-programmable gate array (FPGA) during runtime.

Career Highlights

Han Ju Lee is currently employed at Intel Corporation, where he continues to innovate and develop cutting-edge technologies. His work at Intel has positioned him as a key player in the advancement of integrated circuit technology.

Collaborations

Throughout his career, Han has collaborated with talented individuals such as Xiangyang Guo and Simonjit Dutta. These collaborations have further enhanced the quality and impact of his inventions.

Conclusion

Han Ju Lee's contributions to the field of technology through his patents and work at Intel Corporation highlight his role as a significant inventor. His innovative solutions continue to shape the future of integrated circuits and field-programmable gate arrays.