Santa Clara, CA, United States of America

Haizhou Chen

This inventor holds 2 USPTO granted patents. Top assignee: Cadence Design Systems, Inc.. Active years: 2010-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Haizhou Chen. Retrieved from https://idiyas.com/inventor/haizhou-chen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 2

Forward Citations = 39(Granted Patents)


Company Filing History:


Years Active: 2010-2012

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2 patents (USPTO):Explore Patents

Title: Haizhou Chen: Innovator in Integrated Circuit Design

Introduction

Haizhou Chen is a prominent inventor based in Santa Clara, CA, specializing in integrated circuit design. He has made significant contributions to the field, particularly in the areas of timing, noise, and power analysis of integrated circuits. With a total of 2 patents, his work has had a substantial impact on the design flow of electronic systems.

Latest Patents

Chen's latest patents focus on the development of Design for Manufacturing (DFM) systems that incorporate manufacturing variations in the analysis of integrated circuits. One of his patents addresses the timing, noise, and power analysis of integrated circuits. This innovation calculates predicted manufacturing variations on the shapes of interconnects and devices within a circuit design. The shape variations on interconnects are converted into variations in resistor-capacitor (RC) parasitics, while the shape variations on devices lead to changes in device parameters. These variations ultimately affect timing performance, signal integrity, and power consumption. The results from these analyses are integrated back into the design flow, providing incremental delay files, noise failure commands, and leakage power hotspot commands.

Another patent by Chen focuses on modeling device variations in integrated circuit design. Similar to his previous work, this patent emphasizes the importance of accounting for manufacturing variations in the analysis of integrated circuits. The methodology and results are consistent with his approach to enhancing the design flow and ensuring optimal performance in electronic devices.

Career Highlights

Haizhou Chen is currently employed at Cadence Design Systems, Inc., where he continues to innovate in the field of integrated circuit design. His expertise and contributions have positioned him as a key figure in the industry, driving advancements in electronic design automation.

Collaborations

Throughout his career, Chen has collaborated with notable professionals in the field, including Li-Fu Chang and Richard P. Rouse. These collaborations have further enriched his work and contributed to the development of cutting-edge technologies in integrated circuit design.

Conclusion

Haizhou Chen's contributions to integrated circuit design through his patents and work at Cadence Design Systems, Inc. highlight his role as an influential inventor in the field. His innovative approaches to timing, noise, and power analysis continue to shape the future of electronic design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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