Grenoble, France

Guenole Lallement

This inventor holds 2 USPTO granted patents. Top assignee: Stmicroelectronics (Crolles 2) Sas. Active years: 2019-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Guenole Lallement. Retrieved from https://idiyas.com/inventor/guenole-lallement

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2019-2020

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2 patents (USPTO):Explore Patents

Title: Guenole Lallement: Innovator in Digital Circuitry

Introduction

Guenole Lallement is a prominent inventor based in Grenoble, France. He has made significant contributions to the field of digital circuitry, holding a total of 2 patents. His work focuses on enhancing the efficiency and performance of digital circuits, particularly in low-voltage applications.

Latest Patents

Lallement's latest patents include innovative technologies that address critical challenges in digital circuit design. One of his patents, titled "Body biasing for ultra-low voltage digital circuits," describes a digital circuit that incorporates logic circuitry formed by logic gates. Each logic gate consists of a p-channel MOSFET and an n-channel MOSFET. The body bias generator circuit applies an n-body bias voltage to the n-body bias nodes of the p-channel MOSFETs and a p-body bias voltage to the p-body bias nodes of the n-channel MOSFETs. This circuit operates in two modes to optimize performance and reduce leakage.

Another notable patent is the "Leakage-based oscillator with digital correction." This invention features a multi-stage ring oscillator that generates an output clock signal with a frequency dependent on a digitally controlled leakage current applied to each stage. A calibration circuit processes both a reference clock signal and the output clock signal to adjust the selection signal, ensuring the frequency of the output clock signal aligns with the desired specifications.

Career Highlights

Guenole Lallement is currently employed at STMicroelectronics (Crolles 2) SAS, where he continues to develop cutting-edge technologies in the field of digital electronics. His expertise in low-voltage digital circuits has positioned him as a key player in the industry.

Collaborations

Lallement collaborates with fellow inventor Fady Abouzeid, working together to push the boundaries of innovation in their field.

Conclusion

Guenole Lallement's contributions to digital circuitry through his patents demonstrate his commitment to advancing technology. His work not only enhances the performance of digital circuits but also paves the way for future innovations in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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