Santa Clara, CA, United States of America

Guarav Thareja

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Kepler Computing Inc.. Active years: 2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Guarav Thareja. Retrieved from https://idiyas.com/inventor/guarav-thareja

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 7.0

ph-index = 1


Company Filing History:


Years Active: 2023

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1 patent (USPTO):Explore Patents

Title: Guarav Thareja: Innovator in Low Power Ferroelectric Adders

Introduction

Guarav Thareja is a notable inventor based in Santa Clara, CA. He has made significant contributions to the field of electronics, particularly in the development of low power ferroelectric adders. His innovative approach has the potential to enhance computational efficiency in various applications.

Latest Patents

Thareja holds a patent for a "Majority gate based low power ferroelectric based adder with reset mechanism." This invention features an adder that utilizes first and second majority gates. For a 1-bit adder, the output from a 3-input majority gate is inverted and input two times to a 5-input majority gate. The other inputs to the 5-input majority gate are the same as those of the 3-input majority gate. The output of the 5-input majority gate serves as the sum, while the output of the 3-input majority gate represents the carry. By concatenating multiple 1-bit adders, an N-bit adder can be formed. The input signals are directed to the first terminals of non-ferroelectric capacitors, with the second terminals coupled to create a majority node. The majority function of the input signals occurs at this node, which is then connected to a first terminal of a non-linear polar capacitor. The second terminal of the capacitor provides the output of the logic gate. A reset mechanism is included to initialize the non-linear polar capacitor before the addition function is performed.

Career Highlights

Guarav Thareja is currently employed at Kepler Computing Inc., where he continues to innovate and develop advanced technologies. His work focuses on improving the efficiency and performance of electronic components.

Collaborations

Thareja collaborates with talented individuals such as Sasikanth Manipatruni and Yuan-Sheng Fang. Their combined expertise contributes to the advancement of technology in their field.

Conclusion

Guarav Thareja is a pioneering inventor whose work in low power ferroelectric adders showcases his commitment to innovation. His contributions are poised to make a significant impact in the realm of electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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