Auburn, MI, United States of America

Guanru Wang

This inventor holds 1 USPTO granted patent. Top assignee: Cisco Technology, Inc.. Active years: 2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Guanru Wang. Retrieved from https://idiyas.com/inventor/guanru-wang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1


Company Filing History:


Years Active: 2022

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1 patent (USPTO):Explore Patents

Title: Guanru Wang and Integrated Circuit Clock Gapping

Introduction

Guanru Wang is an inventor associated with Auburn, Michigan, and Cisco Technology, Inc. His work includes a patent for managing clock signals across integrated circuit blocks. The available information lists 1 patent for Wang.

Latest Patents

Wang’s patent, “Integrated Circuit with Clock Gapping,” describes a method for setting different clock gaps for separate blocks within an integrated circuit. The method determines the first block’s clock gap using a performance factor or an external factor, then adjusts the clock signal accordingly. It determines the second block’s clock gap based on the first gap and a performance factor of the second block or the external factor. Because the second gap differs from the first, the method can adjust clock signals to each block according to its respective requirements.

Career Highlights

Wang is associated with Cisco Technology, Inc., where his patent work concerns integrated circuit clock management. The described invention addresses how clock signals can be adjusted for individual blocks based on performance or external considerations.

Collaborations

Anthony Torza and Laura K. Pianin are identified as Wang’s coworkers. The available information does not specify their roles in the patent or the invention.

Conclusion

Guanru Wang’s “Integrated Circuit with Clock Gapping” patent describes a way to apply distinct clock gaps to different integrated circuit blocks, reflecting his work in circuit clock management at Cisco Technology, Inc.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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