San Diego, CA, United States of America

Gregory P Chapelle

This inventor holds 2 USPTO granted patents. Top assignee: Trw Limited. Active years: 2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gregory P Chapelle. Retrieved from https://idiyas.com/inventor/gregory-p-chapelle

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 7(Granted Patents)


Company Filing History:


Years Active: 2003

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2 patents (USPTO):Explore Patents

Title: Gregory P. Chapelle: Innovator in Memory Access Systems

Introduction

Gregory P. Chapelle is a notable inventor based in San Diego, CA. He has made significant contributions to the field of memory access systems, holding 2 patents that showcase his innovative approach to data storage and error correction techniques.

Latest Patents

One of Gregory's latest patents is the "Time Slot Data Memory Storage and Access System." This invention maps a block of data between a time stamp and an addressable memory location, mimicking actual transmission slot timing. The system comprises a slot time module, a calculation conversion module, and an addressing module. The slot time module determines the time stamp for the block of data, while the calculation conversion module generates a preliminary memory location based on the time stamp and a predetermined conversion factor. The addressing module then refines this to produce an addressable memory location.

Another significant patent is the "Single Bit Error Correction, Double Burst Error Detection Technique." This technique provides a correction code for correcting single bit errors and detecting two adjacent bits in error. The received word is multiplied by a parity check matrix to produce a syndrome corresponding to either of two mutually exclusive sets of syndromes if errors are present. This innovative approach allows for the correction of one-bit data errors while reporting two-bit errors, ensuring data integrity.

Career Highlights

Gregory P. Chapelle is currently employed at TRW Limited, where he continues to develop cutting-edge technologies in memory access and error correction. His work has positioned him as a key player in the field, contributing to advancements that enhance data reliability and efficiency.

Collaborations

Gregory has collaborated with notable colleagues, including Lance M. Bodnar and Stephane Mailleau. Their combined expertise fosters an environment of innovation and creativity, leading to groundbreaking developments in their respective fields.

Conclusion

Gregory P. Chapelle's contributions to memory access systems and error correction techniques highlight his role as a significant inventor in the technology sector. His patents reflect a commitment to advancing data storage solutions and ensuring data integrity.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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