Giovanni Ragasa Garbin

Title: Giovanni Ragasa Garbin: Semiconductor Packaging Innovation

Introduction

Giovanni Ragasa Garbin is an inventor associated with Infineon Technologies AG. His patent work concerns semiconductor packaging and lead-frame design.

Latest Patents

Garbin is credited with 1 patent: “Leaded Semiconductor Package Formation Using Lead Frame with Structured Central Pad.” The invention describes a method for forming a semiconductor package using a lead frame with a central metal plate and extending leads. A raised mesa on the plate supports at least part of a semiconductor die, while electrical connections link the die’s terminals to the leads. An encapsulant surrounds the die, with the leads protruding from its sides. The method then thins the plate from its rear surface to isolate the mesa at the encapsulant’s lower surface.

Career Highlights

Garbin’s listed patent reflects work on the structure and manufacture of semiconductor packages. The design combines a shaped central pad, die mounting, electrical interconnections, encapsulation, and rear-side thinning.

Collaborations

Garbin’s listed coworkers include Thorsten Meyer and Fee Hoon Wendy Wong. The patent information provided identifies Infineon Technologies AG as his company.

Conclusion

Giovanni Ragasa Garbin’s patent focuses on a structured lead-frame approach to semiconductor packaging, highlighting his contribution to package formation and design.