George Van Horn Leming, Iii

Title: Biography of George Van Horn Leming, III

Introduction

George Van Horn Leming, III is an accomplished inventor based in Santa Clara, California. He holds three patents that showcase his expertise in processor-based devices and memory management systems. His innovative contributions have significantly impacted the field of computer architecture.

Latest Patents

One of his latest patents is titled "Performing instruction fetch pipeline synchronization (IFPS) in processor-based devices." This invention involves a processor-based device that includes multiple processors, where a remote processor receives a translation lookaside buffer (TLB) invalidation request and subsequently an IFPS request from an issuing processor. The remote processor ensures that all instructions within a fetch pipeline portion have proceeded to the execution pipeline before performing a data synchronization barrier operation.

Another notable patent is "Flexible storage and optimized search for multiple page sizes in a translation lookaside buffer." This patent describes a memory management unit (MMU) that supports various page sizes and dynamically updates page size residency metadata. The unified TLB is designed to optimize TLB lookups based on this metadata, enhancing memory management efficiency.

Career Highlights

George currently works at Ampere Computing LLC, where he continues to develop innovative solutions in the computing industry. His work focuses on enhancing processor performance and memory management, contributing to advancements in technology.

Collaborations

Throughout his career, George has collaborated with notable colleagues, including Bret Leslie