Mountain View, CA, United States of America

Gabriel Barajas

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Microchip Technology Inc.. Active years: 2026.

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations of Gabriel Barajas

Introduction

Gabriel Barajas is an accomplished inventor based in Mountain View, CA (US). He has made significant contributions to the field of programmable logic devices (PLDs). His innovative work focuses on improving the efficiency and accuracy of signal delay estimations in PLD designs.

Latest Patents

Gabriel holds a patent titled "Method and apparatus for estimating signal related delays in a PLD design." This patent describes a method and apparatus that models a PLD design in relation to various stages, each comprising a driver and one or more receivers connected through a wiring tree. The modeling process utilizes a selected set of parameters, including slope-related delays associated with the driver, layout delays of the wiring tree, and slope transfer parameters from previous driver inputs. The estimated signal-related delays are computed for each modeled stage and stored in a computer-readable medium. Gabriel has 1 patent to his name.

Career Highlights

Gabriel Barajas has built a successful career at Microchip Technology Inc., where he applies his expertise in PLD design and signal processing. His work has contributed to advancements in the field, enhancing the performance of various electronic systems.

Collaborations

Some of Gabriel's notable coworkers include Jonathan W Greene and Fei Li. Their collaborative efforts have furthered the development of innovative technologies within the company.

Conclusion

Gabriel Barajas is a notable inventor whose work in PLD design has led to significant advancements in signal delay estimation. His contributions continue to impact the field positively.

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