G B Ashok

Title: G B Ashok: Innovator in Circuit Design Simulation

Introduction

G B Ashok is a notable inventor based in Bengaluru, India. He has made significant contributions to the field of circuit design simulation, particularly through his innovative methodologies that enhance performance and runtime efficiency.

Latest Patents

G B Ashok holds a patent for a co-simulation methodology aimed at addressing performance and runtime challenges of gate-level simulations with SDF timing using emulators. This patent relates to a method and apparatus for more efficiently simulating a circuit design (DUT) by utilizing a hardware functional verification device, such as a processor-based emulator. The invention involves compiling a set of linked databases for the DUT, one for hardware emulation without timing information and another for software simulation that includes timing information. These databases remain synchronized during runtime, allowing for a more effective simulation process.

Career Highlights

G B Ashok is currently employed at Cadence Design Systems, Inc., where he continues to develop and refine innovative solutions in the realm of circuit design. His work has been instrumental in advancing the capabilities of simulation technologies.

Collaborations

G B Ashok collaborates with talented professionals in his field, including Naresh Ramachandran and Ping-Sheng Tseng, who contribute to the innovative environment at Cadence Design Systems, Inc.

Conclusion

G B Ashok's contributions to circuit design simulation through his patented methodologies exemplify his commitment to innovation in technology. His work not only enhances the efficiency of simulations but also sets a benchmark for future advancements in the field.