San Jose, CA, United States of America

Frederic Doucet

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2015.


Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 9(Granted Patents)


Company Filing History:


Years Active: 2015

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1 patent (USPTO):Explore Patents

Title: Innovations of Frederic Doucet in Electronic Design Verification

Introduction

Frederic Doucet is an accomplished inventor based in San Jose, CA (US). He has made significant contributions to the field of electronic design verification. His innovative approach has led to the development of a patented method that enhances the design and verification processes in electronic systems.

Latest Patents

Frederic Doucet holds a patent for a "Method and system for performing verification of an electronic design." This patent presents an improved approach for designing and verifying electronic designs at different levels of abstraction. The method ensures that high-level verification results can be guaranteed to be correct at the Register Transfer Level (RTL). By adhering to model consistency rules, the generation of high-level models and RTL data is streamlined. This innovation allows properties verified at one level of abstraction to remain valid without the need for re-verification at another level.

Career Highlights

Doucet is currently employed at Cadence Design Systems, Inc., a leading company in electronic design automation. His work focuses on enhancing the efficiency and accuracy of electronic design processes. His contributions have been instrumental in advancing the capabilities of design verification tools.

Collaborations

Frederic Doucet collaborates with Robert Paul Kurshan, a fellow expert in the field. Their combined expertise fosters innovation and drives advancements in electronic design verification.

Conclusion

Frederic Doucet's work in electronic design verification exemplifies the impact of innovative thinking in technology. His patented methods are paving the way for more reliable and efficient electronic design processes.

Profile summary based on public USPTO records.
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