Singapore, Singapore

Feifei He

This inventor holds 1 USPTO granted patent. Top assignee: Globalfoundries Singapore Pte. Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Feifei He. Retrieved from https://idiyas.com/inventor/feifei-he-dr6kcose

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Feifei He: Innovator in Thin Film Resistor Technology

Introduction

Feifei He is a notable inventor based in Singapore, recognized for his contributions to the field of thin film resistors. His innovative work has led to the development of a unique patent that addresses critical challenges in electronic component design.

Latest Patents

Feifei He holds a patent for a thin film resistor with a viabar structure. This invention includes conductive lines and a resistive layer, with at least one viabar structure coupled to the resistive layer. The viabar structure features a first portion that connects electrically to the resistive layer and a second portion that connects to the conductive lines. This design reduces current crowding from tight contact spacing and allows for alternative routing of interconnects to the thin film resistor.

Career Highlights

Feifei He is currently employed at Globalfoundries Singapore Pte. Ltd., where he continues to innovate in the field of semiconductor technology. His work has significantly impacted the efficiency and performance of electronic devices.

Collaborations

Feifei has collaborated with talented coworkers, including EeJan Khor and Wanbing Yi, who contribute to the dynamic research environment at Globalfoundries.

Conclusion

Feifei He's contributions to thin film resistor technology exemplify the spirit of innovation in the semiconductor industry. His patent reflects a commitment to advancing electronic component design and improving device performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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