Fei Li

Title: Fei Li: Innovator in Signal Delay Estimation

Introduction

Fei Li is a notable inventor based in San Jose, CA, who has made significant contributions to the field of programmable logic devices (PLDs). His innovative work focuses on methods for estimating signal-related delays, which are crucial for optimizing PLD designs. With a patent to his name, Fei Li exemplifies the spirit of innovation in technology.

Latest Patents

Fei Li holds a patent titled "Method and apparatus for estimating signal related delays in a PLD design." This patent discloses a method and apparatus that models a PLD design in relation to various stages, each comprising a driver and one or more receivers connected through a wiring tree. The modeling process incorporates a selected set of parameters, including slope-related delays associated with the driver, layout delays of the wiring tree, and slope transfer parameters from previous driver inputs. The estimated signal-related delays are computed for each modeled stage and stored in a computer-readable medium. Fei Li's patent represents a significant advancement in the efficiency of PLD design.

Career Highlights

Fei Li is currently employed at Microchip Technology Inc., a leading company in the semiconductor industry. His work at Microchip Technology Inc. allows him to apply his expertise in PLD design and signal delay estimation, contributing to the development of cutting-edge technology.

Collaborations

Fei Li has collaborated with notable colleagues, including Jonathan W Greene and Gabriel Barajas. These collaborations have likely enriched his work and contributed to the innovative solutions he has developed.

Conclusion

Fei Li's contributions to the field of signal delay estimation in PLD design highlight his role as an innovator in technology. His patent and work at Microchip Technology Inc. demonstrate his commitment to advancing the industry.