Farn Wang

Title: Farn Wang - Innovator in Integrated Circuit Design

Introduction

Farn Wang is a notable inventor based in Mountain View, CA (US). He has made significant contributions to the field of integrated circuit design, particularly in noise estimation techniques. His innovative work has led to the development of a unique patent that addresses critical challenges in circuit design.

Latest Patents

Farn Wang holds a patent titled "System and method for topology based noise estimation of submicron integrated circuit designs." This patent describes a tool designed for computing noise coupled onto victim lines from aggressor lines within an integrated circuit. The tool includes code for traversing a victim line of the integrated circuit layout to measure its length, average width, coupling length, and a harmonic mean of spacing between the victim line and aggressor lines. Additionally, it computes the resistance, estimated coupling capacitance, and total capacitance of the victim line based on these parameters. This innovation is crucial for enhancing the performance and reliability of integrated circuits.

Career Highlights

Farn Wang is associated with Sun Microsystems, Inc., where he has applied his expertise in integrated circuit design. His work at the company has been instrumental in advancing technologies that support high-performance computing and data processing.

Collaborations

Farn has collaborated with several talented individuals in his field, including Kathirqamar Aingaran and Stephan Hoerold. These collaborations have fostered an environment of innovation and creativity, leading to advancements in integrated circuit technologies.

Conclusion

Farn Wang's contributions to integrated circuit design through his innovative patent demonstrate his commitment to advancing technology in this critical field. His work continues to influence the development of more efficient and reliable integrated circuits.