Palo Alto, CA, United States of America

Faran Nouri

This inventor holds 1 USPTO granted patent. Top assignee: Analog Devices,inc.. Active years: 1995.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Faran Nouri. Retrieved from https://idiyas.com/inventor/faran-nouri-kqbpox9t

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 1995

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1 patent (USPTO):Explore Patents

Title: Faran Nouri: Innovator in MOS Transistor Technology

Introduction

Faran Nouri is a prominent inventor based in Palo Alto, CA, known for his contributions to semiconductor technology. He has made significant strides in the field of MOS transistors, particularly with his innovative approach to channel dopant profiles.

Latest Patents

Faran Nouri holds a patent for an MOS transistor with a non-uniform channel dopant profile. This invention features a channel formed with two regions that have different dopant concentrations. The region adjacent to the source maintains a normal concentration, while the region adjacent to the drain has a reduced dopant concentration. This design effectively reduces the degrading effects of hot carrier injection, thereby extending the life of the transistor.

Career Highlights

Faran Nouri is currently employed at Analog Devices, Inc., where he continues to push the boundaries of semiconductor technology. His work has garnered attention for its potential to enhance the performance and longevity of electronic devices.

Collaborations

Faran has collaborated with notable colleagues, including Brad W Scharf and Shaheen Mohamedi, who share his passion for innovation in the field of electronics.

Conclusion

Faran Nouri's contributions to MOS transistor technology exemplify the impact of innovative thinking in the semiconductor industry. His work not only advances technology but also paves the way for future developments in electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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