Austin, TX, United States of America

Erik Welty

This inventor holds 1 USPTO granted patent. Top assignee: Nvidia Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Erik Welty. Retrieved from https://idiyas.com/inventor/erik-welty

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Erik Welty: Patent Inventor in Austin

Introduction

Erik Welty is an inventor based in Austin, Texas, whose patent work addresses clock-aware placement of synchronous logic cells in circuit layouts. He is associated with NVIDIA Corporation.

Latest Patents

Welty is named on one patent, “Logic cell placement mechanisms for improved clock on-chip variation.” The invention describes arranging flip-flops and other synchronous logic cells in a predetermined order informed by clock gating, connectivity, and logic-depth analysis of an unplaced netlist. The resulting placements can support more regular clock trees and improve clock on-chip variation, timing, and clock power. The supplied information lists 1 patent for Welty.

Career Highlights

Welty’s documented patent contribution focuses on semiconductor circuit design and the placement of logic cells to account for clock on-chip variation. His work connects netlist analysis with physical layout decisions intended to improve clock-tree characteristics.

Collaborations

The supplied information identifies Anand Kumar Rajaram and David Lyndell Brown as Welty’s coworkers. Their names are also associated with the collaborative context of his patent work.

Conclusion

Erik Welty’s patent reflects an engineering approach to improving clock-tree regularity and circuit performance through clock-aware logic-cell placement.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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