San Diego, CA, United States of America

Eric Taseski


 

Average Co-Inventor Count = 7.2

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2020-2021

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3 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Eric Taseski

Introduction

Eric Taseski is a notable inventor based in San Diego, California. He has made significant contributions to the field of technology, particularly in the realm of system-on-chip (SoC) innovations. With a total of three patents to his name, Taseski's work has had a considerable impact on the industry.

Latest Patents

One of Taseski's latest patents is titled "Boot time determination of calibration parameters for a component coupled to a system-on-chip." This patent describes a method of calibrating a component by receiving previous calibration parameters from a primary SoC and determining their validity. The secondary SoC then operates the external component based on this validity. Another significant patent is "Collated multi-image check in system-on-chips." This invention provides a method for authenticating executable images in an SoC, ensuring the integrity and security of the images through a signed image of hashes.

Career Highlights

Eric Taseski is currently employed at Qualcomm Incorporated, a leading company in the telecommunications and semiconductor industry. His work at Qualcomm has allowed him to develop innovative solutions that enhance the functionality and security of SoCs.

Collaborations

Throughout his career, Taseski has collaborated with talented individuals such as Dhamim Packer Ali and Dhaval Kanubhai Patel. These collaborations have contributed to the advancement of technology in their respective fields.

Conclusion

Eric Taseski's contributions to the field of technology through his patents and work at Qualcomm demonstrate his commitment to innovation. His inventions continue to shape the future of system-on-chip technology.

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