Eric T Tran

Title: Eric T. Tran: Inventor in Semiconductor Processing.

Introduction

Eric T. Tran is an inventor based in Santa Clara, California. His patent work concerns semiconductor processing, particularly reducing impurities during radical treatment of a substrate with a metal layer.

Latest Patents

The provided information lists one patent associated with Tran: “Higher Pressure Purge for Impurity Reduction in Radical Treatment Chamber.” The disclosed method includes preheating a substrate in a radical treatment chamber by exposing it to purge gas and purging that gas at a pressure between 400 and 535 Torr. The process then exposes the substrate to radical species in the chamber. The patent describes this higher-pressure purge as part of post-deposition processing intended to reduce impurities.

Career Highlights

Tran is associated with Applied Materials, Inc., a company whose work includes semiconductor manufacturing technologies. His listed patent reflects an engineering focus on chamber processing and substrate treatment.

Collaborations

The provided information names Pradeep Sampath Kumar and Norman L. Tam as Tran’s coworkers. Their inclusion indicates professional connections, but the available details do not specify their roles in the patent or any particular collaboration.

Conclusion

With 1 patent listed, Eric T. Tran’s documented invention addresses impurity reduction through a higher-pressure purge step in semiconductor radical treatment.