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Bernareggio, Italy

Elisabetta Palumbo

USPTO Granted Patents = 7 (Patent Applications = 1)

Average Co-Inventor Count = 4.0

ph-index = 3

Forward Citations = 33(Granted Patents)

Location History:

Milan, IT (2001 - 2005)
Milano, IT (2008)
Bernareggio, IT (2010)

Company Filing History:

Stmicroelectronics S.r.l.

1 out of 832,718

Other

patents

Years Active: 2001-2010

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7 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7663927 - Reading voltage generator for a non-volatile EEPROM memory cell matrix of a semiconductor device and corresponding manufacturing process (2010-02-16),

2. 7456467 - Process for manufacturing a byte selection transistor for a matrix of non volatile memory cells and corresponding structure (2008-11-25),

3. 6972454 - Process for manufacturing a byte selection transistor for a matrix of non volatile memory cells and corresponding structure (2005-12-06),

4. 6627928 - Method of manufacturing an integrated circuit, for integrating an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip (2003-09-30),

5. 6624471 - Lateral DMOS transistor with first and second drain electrodes in respective contact with high-and low-concentration portions of a drain region (2003-09-23),

6. 6482698 - Method of manufacturing an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip (2002-11-19),

7. 6319780 - Process for the fabrication of an integrated circuit comprising MOS transistors for low voltage, EPROM cells and MOS transistors for high voltage (2001-11-20),

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