Haifa, Israel

Eitan Marcus


Average Co-Inventor Count = 3.8

ph-index = 5

Forward Citations = 51(Granted Patents)


Company Filing History:


Years Active: 2005-2014

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8 patents (USPTO):Explore Patents

Title: Eitan Marcus: Innovator in Digital Logic Verification

Introduction

Eitan Marcus is a prominent inventor based in Haifa, Israel. He has made significant contributions to the field of digital logic verification, holding a total of 8 patents. His work focuses on improving the efficiency and effectiveness of verification processes in digital designs.

Latest Patents

Eitan's latest patents include innovative techniques for segmenting hardware traces and verifying individual trace segments. One notable patent describes a logic verification program, method, and system that segments simulation results and processes these segments separately, and optionally in parallel. This approach reduces memory and system requirements while enhancing the efficiency of verifying digital logic designs. Additionally, he has developed a device, system, and method for modeling homogeneous information, which includes a method that provides a model-based application with an input model featuring a refinable homogeneous record defined by a homogeneous constraint.

Career Highlights

Eitan Marcus is currently employed at International Business Machines Corporation (IBM), where he continues to advance his research and development efforts in digital logic verification. His work has been instrumental in addressing challenges faced in the verification of complex digital systems.

Collaborations

Eitan has collaborated with notable colleagues, including Allon Adir and Roy Emek, contributing to various projects that enhance the capabilities of digital logic verification.

Conclusion

Eitan Marcus stands out as an influential inventor in the realm of digital logic verification, with a strong portfolio of patents that reflect his innovative spirit and dedication to improving technology. His contributions continue to shape the future of digital design verification.

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