International Business Machines Corporation

Eitan Marcus

Allon Adir

Avi Ziv

Roy Emek

Shmuel Ur

Yehezkel Azatchi

Keren Zohar

Itai Jaeger

Gil Eliezer Shurek

Michal Rimon

Christopher John Spandikow

Ronny Morad

Karen Holtz

Tzach Schechner

Amir Voskoboynik

A logic verification program, method and system that segments simulation results and then processes the resulting segments separately, and optionally in parallel, reduces memory and other system requirements and improves efficiency of verification of digital logic designs. The verification process fixes up event dependency check for past-directed checkers by including additional information with each segment after an initial segment that describes at least a portion of a state of the logic design, so that resultant events in the current segment that are caused by events in the previous segment(s) can be traced back to those events. Future directed checks are fixed-up by either repeating a failed check with a concatenation of the current segment and a next segment, or by providing an overlap between segments to ensure that the expected time duration between a causative event and the resulting event are included within the same segment file.

Techniques for segmenting of hardware trace and verification of individual trace segments

Device, system and method of modeling homogeneous information. For example, a method that includes providing to a model-based application an input model including a refinable homogeneous record having a base type, wherein said homogeneous record is defined with a homogeneous constraint to only include data members of a type compatible with the base type. The homogeneous record is defined in a modeling environment that is able to automatically enforce the homogeneous constraint for the homogeneous record and for refinements thereof.

Device, system and method of modeling homogeneous information

A method of automatically defining a new class in a class hierarchy includes creating a descendent class that descends from one or more specified ancestor classes; sequentially analyzing each class along each inheritance path from the specified ancestor classes to a specified similar class to identify each class item in each class that is not selected from the specified ancestor classes; storing a respective pointer for each class item identified in each class that is not inherited by the class referencing the class item and associated with the class; storing a respective pointer for each class item identified in each class that is inherited and redefined by the class referencing the class item and being associated with the class if a pointer referencing the class item is not already stored; and copying each class item referenced by a stored pointer to the descendent class.

Automatic copying by ancestor in object-oriented languages

Apparatus for presentation of functional coverage, including one or more processors and a memory, wherein the memory stores software instructions including instructions for representing a set of attributes of a design under test as a multi-dimensional cross-product space, comprising events corresponding to combinations of values of the attributes to be tested, the events comprising legal and illegal events, instructions for running at least one test on the design, instructions for identifying, responsively to the at least one test, a first group of the legal events that were covered by the at least one test and a second group of the legal events that remain non-covered after the at least one test, instructions for grouping one or more of the illegal events with at least one of the first and second groups so as to generate a simplified model of the functional coverage of the events in the cross-product space and instructions for presenting the simplified model of the functional coverage on an output device. The apparatus further includes an output device coupled to the coverage processor to present the simplified model of the functional coverage to a user.

Efficient presentation of functional coverage results

Improvements in functional verification of a design are achieved by providing a test template that specifies test parameters directed to a function of the design. An exemption mode of operation is associated with a portion of the template, in which constraints and variables associated with the template are revised. The template is an input to a CSP engine, which, in cooperation with a test generator engine, produces test scenarios that lie in an expanded region of the generator's usual operational space. Provision is made for independently enabling and disabling a plurality of exemption modes of operation that are associated with the same or different areas of the template.

Highly specialized scenarios in random test generation

A method for presentation of functional coverage includes representing a set of attributes of a design under test as a multi-dimensional cross-product space, which includes events corresponding to combinations of values of the attributes to be tested, the events including legal and illegal events. At least one test is run on the design, and responsively to the at least one test, a first group of the legal events that were covered by the at least one test and a second group of the legal events that remain non-covered after the at least one test are identified. One or more of the illegal events are grouped with at least one of the first and second groups so as to present a simplified model of the coverage of the events in the cross-product space.

A preemptive reloading technique is employed in a test program generator. Initialized resources are reset with needed values by reloading instructions. The actual reloaded value is chosen later, when the instruction that actually needs the value is generated. The test program generator distances the reloading instruction from the instruction that actually needs the value, thus making it possible to avoid fixed test patterns and to generate interference-free test segments during design verification.

Test quality through resource reallocation

A test program generator that produces test instructions according to a specification of a system being verified. The instructions are typically generated randomly, at least in part, and are then. The system is capable of interpreting events, detecting an impending occurrence of an event, and responding to the event by switching to an alternate input stream.

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Haifa, Israel

Eitan Marcus