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For the Inventor, By the Inventor

Melbourne, FL, United States of America

Dyer A Matlock

USPTO Granted Patents = 11

Average Co-Inventor Count = 2.0

ph-index = 8

Forward Citations = 226(Granted Patents)


Company Filing History:

goldMedal11 out of 3,523 
 
Harris Corporation
 patents

Years Active: 1986-1995

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11 patents (USPTO):Explore Patents
1. 5429958 - Process for forming twin well CMOS integrated circuits (1995-07-04),
2. 5247199 - Process for forming twin well CMOS integrated circuits (1993-09-21),
3. 5185292 - Process for forming extremely thin edge-connectable integrated circuit (1993-02-09),
4. 5071792 - Process for forming extremely thin integrated circuit dice (1991-12-10),
5. 4908683 - Technique for elimination of polysilicon stringers in direct moat field (1990-03-13),
6. 4829359 - CMOS device having reduced spacing between N and P channel (1989-05-09),
7. 4814285 - Method for forming planarized interconnect level using selective (1989-03-21),
8. 4716071 - Method of ensuring adhesion of chemically vapor deposited oxide to gold (1987-12-29),
9. 4713260 - Method of ensuring adhesion of chemically vapor deposited oxide to gold (1987-12-15),
10. 4702000 - Technique for elimination of polysilicon stringers in direct moat field (1987-10-27),
11. 4624749 - Electrodeposition of submicrometer metallic interconnect for integrated (1986-11-25),

Title: The Innovative Contributions of Dyer A. Matlock

Introduction

Dyer A. Matlock, an accomplished inventor based in Melbourne, FL, has made significant strides in the field of integrated circuits. With a remarkable portfolio of 11 patents, his work primarily focuses on advancements in complementary metal-oxide-semiconductor (CMOS) technology, showcasing his expertise and commitment to innovation.

Latest Patents

Matlock’s latest patents include groundbreaking processes for forming twin well CMOS integrated circuits. One patent outlines a process for forming complementary insulated gate field effect transistors, which involves creating first and second well regions of different conductivity types in a planar semiconductor layer. This process utilizes a retrograde impurity distribution profile to enhance device performance. Additionally, he has patented a complementary insulated gate field effect transistor that features a hardened field insulator layer, effectively improving the durability and reliability of the integrated circuits he helps to develop.

Career Highlights

Throughout his career at Harris Corporation, Dyer Matlock has been pivotal in enhancing semiconductor technology. His strategic insights and technical knowledge have contributed to the development of cutting-edge electronic components that play a crucial role in a variety of modern devices. His eleven patents reflect a dedication to pushing the boundaries of electrical engineering and integrated circuit design.

Collaborations

Dyer Matlock has worked alongside notable colleagues, including Jimmy C. Black and Bruce E. Roberts. These collaborations have fostered a creative environment that has led to multiple innovations within Harris Corporation, further advancing the company's technological capabilities.

Conclusion

Dyer A. Matlock's work exemplifies the spirit of innovation and dedication to excellence in the field of integrated circuits. His patents continue to influence the development of advanced technologies, ensuring that he remains a significant figure in the realm of semiconductor research and development. Through his contributions, Matlock not only showcases his talent as an inventor but also his commitment to enhancing the future of electronics.

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